RTL to GDSII Flow Intern
Insights
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Date posted
July 15, 2025
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Closing date
August 28, 2025
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Location
Delhi NCR
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Offered Stipend
₹4,500 - ₹5,500/month
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Duration
5 Months
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Degree
B.Tech
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Year of Study
Third Year
Description
About the Role:
Join the full SoC design cycle, learning end-to-end processes from RTL design to final GDSII layout generation.
Responsibilities:
Assist RTL team in code optimization
Support verification and DRC checks
Learn EDA workflows including LVS and layout design
Ideal Candidate:
Enthusiastic about semiconductor workflows
Good command over digital design and scripting (TCL/Perl)
Greatness Starts Here
41 days left to apply
